`timescale 1ns / 1ps
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// Company: 
// Engineer: 
// 
// Create Date:    10:11:42 02/24/2011 
// Design Name: 
// Module Name:    csauser 
// Project Name: 
// Target Devices: 
// Tool versions: 
// Description: 
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////



module Four2Two #(parameter BitWidth=20)(
	input [BitWidth-1:0] w_in,
	input [BitWidth-1:0] x_in,
   input [BitWidth-1:0] y_in,
	input [BitWidth-1:0] z_in,
	 output [BitWidth-1:0] ps_out,
	 output [BitWidth-1:0] sc_out
	 );
	
	wire [BitWidth-1:0] pSout;
	wire [BitWidth-1:0] sCout;
	
	csanbit #(.N(BitWidth)) csa_Nbit (w_in, x_in, y_in, pSout, sCout);
	
	csanbit #(.N(BitWidth)) _csa_Nbit (pSout, sCout, z_in, sc_out , ps_out );
	


endmodule
